next up previous contents
Next: The DEC 21152 PCI Up: PCI and the i960RP Previous: Enable Configuration Cycles

Mapping the Private PCI Devices

The host BIOS must initialize the entire computer so that address spaces of all the accessible devices do not overlap. This involves stepping through all the devices and all the bridges on the PCI bus, including the public PCI devices on the ISE board, getting address space requirements and assigning address space. PCI address space cannot be allocated arbitrarily, lest devices outside of the direct control of the ISE board, including the motherboard, get confused.

  figure477
Figure 2: PCI Address Space With Bridges

Figure  tex2html_wrap1156 shows a schematic of a PCI address space with public devices on an ISE board. The host BIOS assigns a region of space to the ISE board and maps public devices within that region. The DEC bridge on the ISE board, if public, is given a sub-region within the ISE space and devices beyond that bridge are mapped within the assigned region. This is generic behavior of PCI host systems, and is essentially required by the PCI specification.

Private PCI devices will not be configured by the host computer, so the i960 should take care of them after the BIOS has mapped all the public devices. It is thus up to the i960 software to choose suitable locations in the address space and set the configuration registers.

[Problem - How does one tell that the BIOS is done? Wait for a device driver?]

After the BIOS is finished, the Memory Base and Memory Limit registers in the bridge configuration space will contain the regions used to map all the public devices on the ISE board. Private PCI devices can be mapped anywhere outside those regions, as long as they don't conflict with the mapped location of memory or processor control registers.

The Address Translation Unit of the i960RP has a direct translation window in the region 0x2000 - 0x80000000 where, when enabled, addresses are automatically directed to the secondary PCI bus. This saves precious ATU translation registers so is an ideal place to map private devices. It is also no accident that earlier in this document the i960 local memory was mapped away from this region.

The i960 software must check for the presence of all the private devices, probe the BAR registers for all the devices and function units, and generate an address map. Cards can be detected as present using the ISE_PRSNT# signals in the ISE_STATUS register described earlier. Devices can also be probed by reading the id registers from the configuration space of the potential device. If the device exists, the id will have a value other then 0xffffffff.

The DEC bridge and the IMC can be presumed present. The CIP may be presumed present, or may be polled. The physical part may be installed, but if it is not programmed as a PCI device, it will not respond to PCI cycles and is essentially absent.


next up previous contents
Next: The DEC 21152 PCI Up: PCI and the i960RP Previous: Enable Configuration Cycles

Stephen Williams
Wed Mar 12 23:32:37 PST 1997