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Image Memory Controller

  table750
Table 14: IMC Configuration Space

The IMC is a PCI device with two addressable regions--the image memory and the control registers. The image memory region, described by BAR0 in the configuration space, is 128 Megabytes. Accesses to this region are mapped to the beginning of the SDRAM that is the image memory on the ISE board. The control registers, BAR1, are described

  table763
Table 15: Image Memory Controller Registers (BAR1)

in Table  tex2html_wrap1161 . Despite its small size, the IMC control register region takes up 24 bits of address space. The image memory region, BAR0, uses 27 bits.



Stephen Williams
Wed Mar 12 23:32:37 PST 1997