The components of the ISE board are arranged across two on-board PCI busses and an on-board high speed memory bus. The device in turn connects to the PCI bus of a host computer. This involves the programmer with up to four busses
Figure 1: Block Diagram of ISE board
(See Figure 
):
The Secondary PCI bus connects the i960RP and up to four daughter cards. The i960RP may directly access the secondary bus, and the host may access the secondary bus through the i960RP acting as a PCI bridge. Software running on the i960RP must arrange for the proper configuration of the secondary PCI bus, including arranging for arbitration and interrupt dispatch.
The Tertiary PCI bus connects up to three more daughter cards, and also the Configurable Image Processor and the High Speed Memory DMA controller. This bus is intended to be relatively isolated from the other parts of the board, although a PCI-to-PCI bridge connects this bus to the Secondary PCI bus.
The High Speed Memory bus (or the ``memory bus'' for short) connects a DMA controller and the Configurable Image Processor to up to 64MBytes of synchronous DRAM. While the PCI busses run at 33MHZ and are capable of up to 133 MBytes/Sec, the memory bus is designed to move data at up to 200 MBytes/Sec. Graphics transformations, especially those involving continuous-tone images, tend to require high memory performance.